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stanislav_maslovski
modified 1 year ago

RS-trigger based asynchronous arbiter

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01:17:35
This circuit has two inputs and two outputs. When idle, both inputs are at 0 (note that this is atypical for a NAND-based RS trigger). A 0->1 transition at one of the inputs that happens before a similar transition on the other input is passed to the respective output, while the other output is suppressed until the former input transits back to 0. If both inputs transit from 0 to 1 simultaneously, the RS trigger enters a metastable state, which is resolved after some time (this situation is observed at the start of simulation). The four MOSFETs at the outputs block propagation of the metastable levels to the outputs until metastability is resolved.
published 1 year ago

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